diff -i -E -b -r AppleRTL8139Ethernet-4/RTL8139.cpp PCGenRTL8139Ethernet-4/RTL8139.cpp
34a35,48
> /*
>  * Portions copyright (c) 2007 orByte.  All rights reserved. 
>  *
>  * rtl8139.cpp
>  *
>  * HISTORY
>  *
>  * 09-Jan-07	orByte, added following features:
>  *				(+) Run-time allocation of MMIO/PIO access mode
>  *				(+) Option to override PIO, and use MMIO instead
>  *		
>  *
>  */
> 
39c53
< OSDefineMetaClassAndStructors( com_apple_driver_RTL8139,
---
> OSDefineMetaClassAndStructors( com_orByte_driver_RTL8139,
47a62,77
> 	// initialize ioAccessMode to PIO
> 	
> 	ioAccessMode		   = kIOAccessModeIsPIO;
> 	
> 	// check forced MMIO mode
> 	OSDictionary *RTL8139EthernetDict;
> 	RTL8139EthernetDict = OSDynamicCast(OSDictionary, properties);
> 	if (OSDynamicCast(OSDictionary, RTL8139EthernetDict) != NULL) {
> 		if (RTL8139EthernetDict->getObject("ForceMMIOAccess") != NULL)
> 		{
> 			OSBoolean * forceMMIOAccess;
> 			forceMMIOAccess = OSDynamicCast(OSBoolean, RTL8139EthernetDict->getObject("ForceMMIOAccess"));
> 			if (forceMMIOAccess->isTrue()) ioAccessMode = kIOAccessModeIsMMIO;
> 		}
> 	}
> 
50a81,82
> 	DEBUG_LOG("RTL: init() ===>\n");
> 
85c117
<         if ( false == initEventSources(provider) )
---
>         if ( false == initEventSources( provider ) )
93a126,137
> 		// Print device info to IO Log
> 		
> 		UInt vendorId = pciNub->configRead16( kIOPCIConfigVendorID );
> 		UInt deviceId = pciNub->configRead16( kIOPCIConfigDeviceID );
> 		UInt revId = pciNub->configRead16( kIOPCIConfigRevisionID );
> 		
> 	    IOLog("%s: vendorID = 0x%04x deviceID = 0x%04x revisionID = 0x%04x\n", getName(), vendorId, deviceId, revId);
> 		IOLog("%s: found PIO accessor at %x\n", getName(), (uint32_t) pciNub->configRead32( kIOPCIConfigBaseAddress0 ));
> 		IOLog("%s: found MMIO accessor at %X\n", getName(), (uint32_t) pciNub->configRead32( kIOPCIConfigBaseAddress1 ));		
> 		
> 		DEBUG_LOG("csrMap() ===>\n");
> 		
95c139,141
<         // Base Address Range 0 (0x10).
---
>         // Base Address Range 0 (0x10). (PIO access)
> 		// Base Address Range 1 (0x14). (MMIO access)
> 		// Check for PIO first
96a143,144
> 		if (ioAccessMode == kIOAccessModeIsPIO)
> 		{
97a146,159
> 			if (0 == csrMap)
> 			{
> 				IOLog("%s: could not initialize PIO mode, switching to MMIO mode...\n", getName() );
> 				ioAccessMode = kIOAccessModeIsMMIO;
> 				csrMap = pciNub->mapDeviceMemoryWithRegister( kIOPCIConfigBaseAddress1 );
> 			}
> 		}
> 		else
> 		{
> 			IOLog("%s: PIO mode not requested, forcing MMIO mode...\n", getName() );
> 			csrMap = pciNub->mapDeviceMemoryWithRegister( kIOPCIConfigBaseAddress1 );
> 		}
> 		
> 		
98a161,162
> 		{
> 			IOLog("%s: could not initialize MMIO mode, failed IO initialization. Aborting...\n", getName() );
99a164,166
> 		}
> 		
> 		DEBUG_LOG("csrMap() <===\n");
102a170,191
> 		// Initialize csr access method
> 		
> 		if (ioAccessMode == kIOAccessModeIsPIO) 
> 		{
> 			ioAccessorPIO * ioSocket = new ioAccessorPIO;
> 			csrAccess = ioSocket->withIOMode(pciNub, csrMap);
> 			if (ioSocket) ioSocket->release();
> 		}
> 		else
> 		{
> 			ioAccessorMMIO * ioSocket = new ioAccessorMMIO;
> 			csrAccess = ioSocket->withIOMode(csrBase);
> 			if (ioSocket) ioSocket->release();
> 		}
> 		
> 		if (0 == csrAccess) break;
> 		
> 		// Print IO Mode Feedback
> 		if (ioAccessMode == kIOAccessModeIsPIO) IOLog("%s: using PIO access mode...\n", getName() );
> 		else IOLog("%s: using MMIO access mode...\n", getName() );
> 		IOLog("%s: io access at csrBase=%x.\n", getName(), (uint32_t) csrBase );
> 
227,228d315
<     UInt16 reg;
<         
231c318,319
<     reg = provider->configRead16( kIOPCIConfigCommand );
---
> 	UInt32 configMask = 0;
> 	UInt32 configBits = 0;
233,235c321
<     reg |= ( kIOPCICommandBusMaster |
<              kIOPCICommandIOSpace   |
<              kIOPCICommandMemWrInvalidate );
---
> 	configMask = configBits = kIOPCICommandMemWrInvalidate;
237c323
<     reg &= ~kIOPCICommandMemorySpace;
---
> 	// provider is the PCI nub object
239c325,328
<     provider->configWrite16( kIOPCIConfigCommand, reg );
---
> 	provider->setBusMasterEnable( true );
> 	provider->setMemoryEnable( ( ioAccessMode == kIOAccessModeIsMMIO ) );
> 	provider->setIOEnable( ( ioAccessMode == kIOAccessModeIsPIO ) );
> 	provider->setConfigBits( kIOPCIConfigCommand, configMask, configBits );
316a406
> 	RELEASE( csrAccess    );
387c477
<                 UInt16 isr = csrRead16( RTL_ISR );
---
>                 UInt16 isr = csrAccess->csrRead16( RTL_ISR );
390c480
<                     csrWrite16( RTL_ISR, R_ISR_PUN );
---
>                     csrAccess->csrWrite16( RTL_ISR, R_ISR_PUN );
609,610c699,700
<         csrWrite32( RTL_MAR0, 0xffffffff );
<         csrWrite32( RTL_MAR4, 0xffffffff );
---
>         csrAccess->csrWrite32( RTL_MAR0, 0xffffffff );
>         csrAccess->csrWrite32( RTL_MAR4, 0xffffffff );
617,618c707,708
<         csrWrite32( RTL_MAR0, reg_mar0 );
<         csrWrite32( RTL_MAR4, reg_mar4 );
---
>         csrAccess->csrWrite32( RTL_MAR0, reg_mar0 );
>         csrAccess->csrWrite32( RTL_MAR4, reg_mar4 );
621c711
<     csrWrite32( RTL_RCR, reg_rcr );
---
>     csrAccess->csrWrite32( RTL_RCR, reg_rcr );
673,674c763,764
<     csrWrite32( RTL_MAR0, reg_mar0 );
<     csrWrite32( RTL_MAR4, reg_mar4 );
---
>     csrAccess->csrWrite32( RTL_MAR0, reg_mar0 );
>     csrAccess->csrWrite32( RTL_MAR4, reg_mar4 );
707c797
<     idr.int32 = OSSwapLittleToHostInt32(csrRead32( RTL_IDR0 ));
---
>     idr.int32 = OSSwapLittleToHostInt32(csrAccess->csrRead32( RTL_IDR0 ));
713c803
<     idr.int32 = OSSwapLittleToHostInt32(csrRead32( RTL_IDR4 ));
---
>     idr.int32 = OSSwapLittleToHostInt32(csrAccess->csrRead32( RTL_IDR4 ));
diff -i -E -b -r AppleRTL8139Ethernet-4/RTL8139.h PCGenRTL8139Ethernet-4/RTL8139.h
34a35,48
> /*
>  * Portions copyright (c) 2007 orByte.  All rights reserved. 
>  *
>  * rtl8139.h
>  *
>  * HISTORY
>  *
>  * 09-Jan-07	orByte, added following features:
>  *				(+) Run-time allocation of MMIO/PIO access mode
>  *				(+) Option to override PIO, and use MMIO instead
>  *		
>  *
>  */
> 
51a66
> 
52a68,72
> #include "RTL8139IO.h"
> 
> 
> 
> 
58c78
< #define DEBUG_LOG(args...)  kprintf(args)
---
> #define DEBUG_LOG(args...)  printf(args)
99c119,120
< #define RTL8139 com_apple_driver_RTL8139
---
> 
> #define RTL8139 com_orByte_driver_RTL8139
103c124
< 	OSDeclareDefaultStructors( com_apple_driver_RTL8139 )
---
> 	OSDeclareDefaultStructors( com_orByte_driver_RTL8139 )
105a127
> 
151a174,181
> 	// set in class initialization
> 	int						   ioAccessMode;
> 	
> 	enum {
> 	   kIOAccessModeIsPIO = 0,
> 	   kIOAccessModeIsMMIO
> 	};
> 
213,238c243
< 	inline void csrWrite32( UInt16 offset, UInt32 value )
<     { pciNub->ioWrite32(offset, value, csrMap); }
< 
<     inline void csrWrite16( UInt16 offset, UInt16 value )
<     { pciNub->ioWrite16(offset, value, csrMap); }
< 
<     inline void csrWrite8(  UInt16 offset, UInt8 value )
< 	{ pciNub->ioWrite8(offset, value, csrMap); }
< 
< 	inline void csrWrite32Slow( UInt16 offset, UInt32 value )
<     { pciNub->ioWrite32(offset, value, csrMap); pciNub->ioRead32(offset, csrMap); }
< 
<     inline void csrWrite16Slow( UInt16 offset, UInt16 value )
<     { pciNub->ioWrite16(offset, value, csrMap); pciNub->ioRead16(offset, csrMap); }
< 
<     inline void csrWrite8Slow(  UInt16 offset, UInt8 value )
< 	{ pciNub->ioWrite8(offset, value, csrMap); pciNub->ioRead8(offset, csrMap); }
< 
<     inline UInt32 csrRead32( UInt16 offset )
<     { return pciNub->ioRead32(offset, csrMap); }
< 
<     inline UInt16 csrRead16( UInt16 offset )
<     { return pciNub->ioRead16(offset, csrMap); }
< 
<     inline UInt8  csrRead8(  UInt16 offset )
<     { return pciNub->ioRead8(offset, csrMap); }
---
> 	ioAccessor * csrAccess;
diff -i -E -b -r AppleRTL8139Ethernet-4/RTL8139PHY.cpp PCGenRTL8139Ethernet-4/RTL8139PHY.cpp
33a34,47
> /*
>  * Portions copyright (c) 2007 orByte.  All rights reserved. 
>  *
>  * rtl8139phy.cpp
>  *
>  * HISTORY
>  *
>  * 09-Jan-07	orByte, added following features:
>  *				(+) Run-time allocation of MMIO/PIO access mode
>  *				(+) Option to override PIO, and use MMIO instead
>  *		
>  *
>  */
> 
71c85
< 	reg_bms = csrRead16( RTL_BMS );
---
> 	reg_bms = csrAccess->csrRead16( RTL_BMS );
118c132
<         if ( csrRead16( RTL_BMS ) & MII_STATUS_AUTONEG_COMPLETE )
---
>         if ( csrAccess->csrRead16( RTL_BMS ) & MII_STATUS_AUTONEG_COMPLETE )
150c164
<             csrWrite16( RTL_BMC, MII_CONTROL_AUTONEG_ENABLE  |
---
>             csrAccess->csrWrite16( RTL_BMC, MII_CONTROL_AUTONEG_ENABLE  |
188c202
< 			csrWrite16( RTL_BMC, control );
---
> 			csrAccess->csrWrite16( RTL_BMC, control );
229c243
<     phyStatus = csrRead16( RTL_BMS );
---
>     phyStatus = csrAccess->csrRead16( RTL_BMS );
243,244c257,258
<             UInt8  mediaStatus = csrRead8( RTL_MEDIA_STATUS );
<             UInt16 modeControl = csrRead16( RTL_BMC );
---
>             UInt8  mediaStatus = csrAccess->csrRead8( RTL_MEDIA_STATUS );
>             UInt16 modeControl = csrAccess->csrRead16( RTL_BMC );
diff -i -E -b -r AppleRTL8139Ethernet-4/RTL8139Private.cpp PCGenRTL8139Ethernet-4/RTL8139Private.cpp
33a34,47
> /*
>  * Portions copyright (c) 2007 orByte.  All rights reserved. 
>  *
>  * rtl8139Private.cpp
>  *
>  * HISTORY
>  *
>  * 09-Jan-07	orByte, added following features:
>  *				(+) Run-time allocation of MMIO/PIO access mode
>  *				(+) Option to override PIO, and use MMIO instead
>  *		
>  *
>  */
> 
35a50
> 
49c64
<         tx_status = csrRead32( RTL_TSD0 + tx_ack_index * 4 );
---
>         tx_status = csrAccess->csrRead32( RTL_TSD0 + tx_ack_index * 4 );
60c75
<             tcr = csrRead32( RTL_TCR );
---
>             tcr = csrAccess->csrRead32( RTL_TCR );
62c77
<             csrWrite32( RTL_TCR, tcr );
---
>             csrAccess->csrWrite32( RTL_TCR, tcr );
113c128
<     while ( ( csrRead8( RTL_CM ) & R_CM_BUFE ) == 0 )
---
>     while ( ( csrAccess->csrRead8( RTL_CM ) & R_CM_BUFE ) == 0 )
191c206
<         tmp_capr = csrRead16( RTL_CAPR );
---
>         tmp_capr = csrAccess->csrRead16( RTL_CAPR );
193c208
<         csrWrite16Slow( RTL_CAPR, tmp_capr );        
---
>         csrAccess->csrWrite16Slow( RTL_CAPR, tmp_capr );        
203c218
<     UInt8 tmp_cm = csrRead8( RTL_CM );
---
>     UInt8 tmp_cm = csrAccess->csrRead8( RTL_CM );
206c221
<     csrWrite8( RTL_CM, tmp_cm );
---
>     csrAccess->csrWrite8( RTL_CM, tmp_cm );
213c228
<     csrWrite32( RTL_RBSTART, rx_buf_phys );
---
>     csrAccess->csrWrite32( RTL_RBSTART, rx_buf_phys );
216c231
<     csrWrite8( RTL_CM, tmp_cm );
---
>     csrAccess->csrWrite8( RTL_CM, tmp_cm );
218c233
< 	csrWrite32( RTL_RCR, reg_rcr );
---
> 	csrAccess->csrWrite32( RTL_RCR, reg_rcr );
225c240
<     csrWrite16( RTL_IMR, R_ISR_ALL );
---
>     csrAccess->csrWrite16( RTL_IMR, R_ISR_ALL );
231c246
<     csrWrite16( RTL_IMR, R_ISR_NONE ); 
---
>     csrAccess->csrWrite16( RTL_IMR, R_ISR_NONE ); 
240a256,257
> 	DEBUG_LOG("allocateDescriptorMemory() ===>\n");
> 
283a301,302
> 	DEBUG_LOG("allocateDescriptorMemory() <===\n");
> 	
297c316,317
<     csrWrite8( RTL_CM, R_CM_RST );
---
>     csrAccess->csrWrite8( RTL_CM, R_CM_RST );
> 
298a319
> 	for (int i = 0; i < 12; i++) {
299a321
> 		if ( (csrAccess->csrRead8( RTL_CM ) & R_CM_RST) == 0  ) break;
300a323
> 	}
302c325,326
<     if ( csrRead8( RTL_CM ) & R_CM_RST )
---
> 	disableHardwareInterrupts();
>     if ( csrAccess->csrRead8( RTL_CM ) & R_CM_RST )
304a329,343
> 		// orByte: Added linux recovery sequence
> 
> 		IOLog("%s: Software reset failed...\n", getName());
> 		IOLog("%s: Attempting hard reset...\n", getName());
> 		
> 		disableHardwareInterrupts();
> 		csrAccess->csrWrite8( RTL_CM, (csrAccess->csrRead8( RTL_CM ) & ~( R_CM_RST )));
> 		
> 		for (int i = 0; i < 12*5; i++) {
> 			IODelay(1000);
> 		}
> 		
> 		disableHardwareInterrupts();
> 		if ( csrAccess->csrRead8( RTL_CM ) & R_CM_RST )
> 		{		
308a348,351
> 		IOLog("%s: Continuing Operations...\n", getName());
>     }
> 	
> 
316,317c359,360
<     csrWrite32( RTL_MAR0, reg_mar0 );
<     csrWrite32( RTL_MAR4, reg_mar4 );
---
>     csrAccess->csrWrite32( RTL_MAR0, reg_mar0 );
>     csrAccess->csrWrite32( RTL_MAR4, reg_mar4 );
321c364
<     reg_config1 = csrRead8( RTL_CONFIG1 );	
---
>     reg_config1 = csrAccess->csrRead8( RTL_CONFIG1 );	
328c371
<     csrWrite32( RTL_RBSTART, rx_buf_phys );
---
>     csrAccess->csrWrite32( RTL_RBSTART, rx_buf_phys );
334c377
<         csrWrite32( RTL_TSAD0 + i * 4, tx_buf_phys[i] );
---
>         csrAccess->csrWrite32( RTL_TSAD0 + i * 4, tx_buf_phys[i] );
346c389
<     csrWrite8( RTL_CM, R_CM_RE | R_CM_TE );
---
>     csrAccess->csrWrite8( RTL_CM, R_CM_RE | R_CM_TE );
350c393
<     csrWrite32( RTL_TCR, R_TCR_MXDMA | R_TCR_IFG );
---
>     csrAccess->csrWrite32( RTL_TCR, R_TCR_MXDMA | R_TCR_IFG );
359c402
<     csrWrite32( RTL_RCR, reg_rcr );
---
>     csrAccess->csrWrite32( RTL_RCR, reg_rcr );
385c428
<         isr = csrRead16( RTL_ISR );
---
>         isr = csrAccess->csrRead16( RTL_ISR );
398c441
<         csrWrite16( RTL_ISR, isr );
---
>         csrAccess->csrWrite16( RTL_ISR, isr );
502c545
<     csrWrite32( RTL_TSD0 + (4 * tx_send_index), pkt_len | R_TSD_ERTXTH );
---
>     csrAccess->csrWrite32( RTL_TSD0 + (4 * tx_send_index), pkt_len | R_TSD_ERTXTH );
551c594
<     csrWrite32( RTL_TSD0 + (4 * tx_send_index), pkt_len | R_TSD_ERTXTH );
---
>     csrAccess->csrWrite32( RTL_TSD0 + (4 * tx_send_index), pkt_len | R_TSD_ERTXTH );
570c613
<         tx_status = csrRead32( RTL_TSD0 + tx_ack_index * 4 );
---
>         tx_status = csrAccess->csrRead32( RTL_TSD0 + tx_ack_index * 4 );
577c620
<             tmp_ul = csrRead32( RTL_TCR );
---
>             tmp_ul = csrAccess->csrRead32( RTL_TCR );
579c622
<             csrWrite32( RTL_TCR, tmp_ul );
---
>             csrAccess->csrWrite32( RTL_TCR, tmp_ul );
606c649
<         if ( (csrRead8( RTL_CM ) & R_CM_BUFE) == R_CM_BUFE )
---
>         if ( (csrAccess->csrRead8( RTL_CM ) & R_CM_BUFE) == R_CM_BUFE )
647c690
<         capr = csrRead16( RTL_CAPR );
---
>         capr = csrAccess->csrRead16( RTL_CAPR );
649c692
<         csrWrite16Slow( RTL_CAPR, capr );
---
>         csrAccess->csrWrite16Slow( RTL_CAPR, capr );
Only in PCGenRTL8139Ethernet-4/: RTL8139IO.cpp
Only in PCGenRTL8139Ethernet-4/: RTL8139IO.h
