All bridges have the same access.Do all, or only Bridge 3 have Direct Access to Memory Controller?
Every slot has 4 interrupt pins A,B,C,D. These may be reordered per slot. Usually a PCI card uses int A. Int A may be connected to int A or B or C or D on the motherboard or riser because of the reordering. A multifunction card may use more of the interrupt pins (A,B,C,D). None of that matters, since the Mac combines all interrupts from a slot to a single interrupt bit in one of the Mac's registers. When an interrupt for a slot happens, the OS interrupt handler sees the interrupt bit has changed and just needs to ask the driver for each device downstream of the corresponding slot if the interrupt belongs to it. The device driver checks an interrupt bit of one of the device's registers to determine if the interrupt belongs to it.Still curious how "INTA#, INTB#, INTC#, INTD# wires combined by OR per slot to provide a unique slot interrupt for each card." can work if the interrupts are tied together on the logic board? What's the significance of that INTA# nomenclature?
The schematic for J8 of the 6500 says the reserved pins are for a PCI adapter card. I suppose the PCI adapter card is an Apple specific adapter so it can do weird stuff like requiring reserved pins to handle separate interrupts.So why is Riser Slot_B, INTC wired to Reserved_A9?
The numbers are page numbers in the schematics that tell you where the signals go.There it is, "Reserved" Pin A11 of the PCI Spec is defined in the 6500 schematic as Interrupt for Slot_C, or so it would seem! A9 is defined as I buzzed out on the Riser for Slot_B as well.
View attachment 17710
A11 = PCI_SLOT3_INT (7,12,21)
A9 = PCI_SLOT2_INT (7,21)
Dunno what the numbers mean, but that's enough for tonight!